STRE	 	Prototype
	SGLB	Misc/Class Reference
		CLAS	354492	Inverter
	ESBR
	SORD	2
		LITO	0	output
		LITO	21845	MAP
		LITO	0	input 1
		LITO	0	input 2
		LITO	0	input 3
		LITO	0	input 4
	ESBR
	SGLB	Output/#1
		LCON	 	/*+0,144,72,45;Output
	ESBR
ESTR
STRE
	SGLB	Misc/Superclass Reference
		CLAS	354198	SuperGates
	ESBR
	SGLB	General/Initialize
		CMNT	 	Expects:  É ¥ inst/É
		GSYM	Logic/Initialize	É ¥ method/inst/É
		PRIM	Heap/Delegate to self
	ESBR
	SGLB	Logic/Get Input 4	override
	ESBR
	SGLB	Logic/Get Input 3	override
	ESBR
	SGLB	Logic/Get Input 2	override
	ESBR
	SGLB	Logic/Input 2	override
	ESBR
	SGLB	Logic/Input 4	override
	ESBR
	SGLB	Logic/Input 3	override
	ESBR
ESTR
CMTL	5	graphic info
	CMNT	4	-18,0,162,144
	CMTL	3	0
		CMNT	24	0,0,72,45,2,3,;Logic/Input 1
	ECMT
	CMTL	7	0
		CMNT	14	118,68,1,2,1,Logic/Get Output;/t,F,T
		CMNT	22	-10,68,1,2,3,Logic/Get Input 1;/t,F,T
	ECMT
	CMNT	12	0,18,0,126
	CMNT	10	108,72
	CMNT	10	0,18
	CMNT	44	108,54,144,90
ECMT